Scalable Tools Workshop 2026

Binary Code Analysis and Instrumentation for AMD GPUs

Hsuan-Heng Wu

Abstract

Static binary rewriting—patching a compiled binary ahead of execution to insert analysis code—is well established for Dyninst on CPUs, but no comparable capability exists for AMD GPUs. We present a system that extends Dyninst to AMD GPU HIP code objects: it offline-rewrites a kernel's code object to splice in calls to a user-written device-probe library, leaving the application source and toolchain untouched.

While Dyninst static binary rewriting requires complex pipelines—spanning control-flow graph construction, AST code generation, basic-block relocation, PC-relative offset patching, and ELF emission—this talk focuses on three key mechanisms enabling AMD GPU mutators that mirror their CPU counterparts:

1. An inter-module call path that resolves each spliced call to a separately compiled probe library through a GOT slot and an R_AMDGPU_ABS64 relocation, linked when both code objects are frozen into a single HSA executable.

2. A GPU→CPU hostcall runtime—implemented as a wait-free, out-of-order-serviced mailbox ring—that allows probes to perform real host-side I/O during kernel execution, enabling live tracing instead of post-execution dumps.

3. A per-wavefront variable abstraction, backed by an arena allocator and host-coherent managed memory delivered as a launch-time kernel argument (kernarg), providing probes with race-free per-wave state whose size is derived from usage and carried self-describingly in the rewritten object; additionally, an implicit-argument capture region preserves entry-only ABI values (such as block/thread indices, dispatch, and kernarg pointers) for use at arbitrary insertion points.

Deployment is transparent: an LD_PRELOAD shim interposes on the HIP/HSA runtime to substitute the rewritten object at load time, link the runtime, and provision per-wave memory—requiring no application changes or runtime code patching. We demonstrate per-wavefront, per-basic-block execution counters (including on wave-divergent kernels that yield distinct per-wave profiles), per-wave file egress, and call-return capture, scaling to ~16K concurrent wavefronts on an AMD MI100 GPU.

Towards Truly Dynamic Binary Instrumentation on AMD GPUs With Luthier

Matin Raayai Ardakani

Abstract

Luthier is a dynamic Binary Instrumentation (DBI) framework for AMD GPUs on the ROCm software stack. Luthier allows its users to inspect and modify the GPU's ISA visible state via its low-level and high-level code injection APIs. In this talk, we will first go over the new features that are being introduced to Luthier, and the challenges they aim to solve. We then conclude the talk by showcasing how these new features will pave the way for supporting additional classes of AMD GPU applications, including those with stripped device code symbols and those directly using the AMD userspace

Very Low-Overhead Continuous Profiling of GPU-Accelerated LLM Workloads

Keren Zhou

Abstract

As large language model (LLM) serving and reinforcement learning (RL) systems increasingly rely on GPUs for acceleration, efficiently utilizing GPU resources has become critically important. Existing monitoring tools such as nvidia-smi provide only coarse-grained utilization metrics, offering little insight into which GPU kernels are underperforming or how close they operate to peak FLOPs. In contrast, traditional profilers such as nsys and rocsys introduce non-trivial overhead (often exceeding 10%), making them impractical for online serving environments where even a 1% performance loss is unacceptable.

Achieving continuous, production-grade profiling poses three key challenges: (1) runtime overhead, as kernel-level timing must be collected without GPU synchronization, excessive CPU locking, or Python GIL contention; (2) memory overhead, since long-running services must avoid CPU memory leaks while profiling continuously over days or months; and (3) storage overhead, as modern LLM workloads may invoke millions of kernels across different call paths and input configurations in a short time, making full trace serialization and offline analysis prohibitively expensive.

In this talk, we present our latest progress on Proton to enable always-on Monitoring of LLM workloads with less than 1% overhead. Proton provides fine-grained kernel-level performance insights while remaining memory efficient for long-running production deployments. Moreover, Proton offers unique visibility into graph-executed LLM workloads by identifying where kernels are captured and reporting per-kernel FLOPs utilization, enabling practitioners to pinpoint inefficiencies that are invisible to existing tools. We achieve this by co-designing the profiling framework and runtime, exposing multi-layer, multi-level profiling APIs tailored to LLM services, which allow performance data to be selectively collected, aggregated, and interpreted with minimal overhead. Core techniques include selective profiling, phase-based profiling and recycling, copy-on-write updates on metadata, lock-free metrics collection, and lightweight metric kernels that custom statistics directly on the GPU without synchronization. kernel driver.

An Autotuning-based Hyperparameter Optimization Framework for Mixed-kernel SVM Classifications in Science and Engineering on Aurora

Xingfu Wu

Abstract

Support Vector Machine (SVM) is a state-of-the-art classification method widely used in science and engineering. In this paper, we propose an autotuning-based hyperparameter optimization framework to optimize hyperparameters in mixed-kernel SVMs to identify their optimal choices, and apply the framework to two SVMs applications in high energy physics (HEP) and tunable mixed-kernel heterojunction transistors (MKH) on the exascale Aurora supercomputer at Argonne National Laboratory.

Our experimental results show that uninformed choices of the regularization parameter C and the coef0 parameter in the mixed-kernel SVMs result in severely low accuracy (5.2%), and the proposed framework effectively optimizes these hyperparameters in the SVMs to quickly identify their optimal choices to achieve the highest accuracy 94.8% for the HEP application and the highest average accuracy 97.3% for the MKH application on up to 32 Aurora nodes.

LLM Agents for Performance Modeling

Grace McLewee

Abstract

This talk presents an agentic AI ecosystem for performance modeling and prediction, built around the orchestration of specialized agents that collaborate to turn raw HPC code into actionable performance predictions. At its core, a code translation agent uses a fine-tuned model and a context-aware chain-of-thought reasoning pipeline to transform HPC code into abstract application models. These models are then handed off to a performance modeling agent, which coordinates a set of tools that fuse application and machine representations to generate predictions. The orchestration layer manages how these agents communicate, delegate, and pass intermediate results, allowing the workflow to operate end to end with minimal human intervention. We evaluate the approach across a range of essential HPC and AI workloads, benchmarks, and applications, demonstrating accurate prediction of key operations such as floating-point operations, loads, and stores, which in turn yields reliable execution-time predictions on modern NVIDIA and AMD GPUs.

Sustainable Application Mapping with mpibind

Edgar Leon

Abstract

As HPC systems continue to evolve toward increasingly heterogeneous architectures with complex memory hierarchies, NUMA domains, and GPU partitioning modes, achieving portable and sustainable performance has become a major challenge for application developers. mpibind is an open-source library that automatically maps MPI processes and their threads to hardware resources based on system topology, eliminating the need for machine-specific launch configurations, manual affinity tuning, or application code changes. Integrated with resource managers such as Slurm and leveraging standard topology discovery interfaces, mpibind provides a lightweight and transparent mechanism for improving locality-aware execution across diverse computing platforms.

This presentation will introduce mpibind and describe how it improves software sustainability by reducing architectural dependency, tuning overhead, and deployment complexity. We will discuss how mpibind abstracts hardware details such as NUMA configurations, heterogeneous CPU-GPU topologies, and GPU partitioning modes, enabling applications to achieve consistent performance across systems ranging from small clusters to leadership-class supercomputers, including Frontier and El Capitan. Proven in production on pre-exascale and exascale platforms, mpibind offers a scalable and portable solution that improves performance portability, maintainability, and usability for scientific applications while allowing researchers to focus on their science rather than system-specific optimization.